Mentor Graphics Acquires Assets of Ponte Solutions—Technology to be Integrated into Calibre DFM SolutionsMay 15, 2008
Mentor Graphics Aligns Product Groups to Address IC Implementation Challenges at 45nm and Beyond May 7, 2008
Mentor Graphics Aligns with UMC to Validate the Accuracy of Calibre nmDRC Physical Verification UMC 65nm DeckApr 29, 2008
STARC Establishes Variation-and-Yield-Aware Design Methodology using Mentor Graphics Calibre LFDMar 26, 2008
Mentor Graphics Calibre nmOPC on Cell/B.E. Platform Qualified for Production at IBMFeb 26, 2008
Mentor Graphics Announces Industry’s First Multi-mode Multi-corner Signal Integrity Solution for 65/45nmDec 10, 2007
Mentor Graphics Olympus-SoC Place and Route System used by STMicroelectronics to Tape Out Set-Top Box ChipNov 27, 2007
Mentor Graphics and TSMC Collaborate to Release 65 nanometer RF Design KitsNov 13, 2007
Mentor Graphics Acquires Sierra Design Automation; Answers Industry Need for Design-to-Fab Flow for 65 and 45 NanometersJun 11, 2007
Mentor Graphics Collaborates with TSMC to Provide Advanced DFM Capabilities in Reference Flow 8.0Jun 5, 2007
Mentor Graphics’ DFM Solution Qualified by Common Platform Technology Alliance for 45nm and 65nmJun 4, 2007
Chartered and Mentor Graphics Team to Offer Technology Design Kits for 65 and 90 Nanometer Common Platform Technology ProcessesMay 31, 2007
Benefits of Mentor Graphics’ Calibre LFD Demonstrated by Infineon-Chartered CollaborationMay 30, 2007
Mentor Graphics and UMC Deliver Analog Mixed-Signal Reference FlowMay 23, 2007
Mentor Graphics and Fujitsu Collaborate to Provide Calibre LFD Solution for Fujitsu’s Internal and Fabless Customers May 22, 2007
UMC Expands Support for Mentor Graphics’ Calibre YieldAnalyzer to Deliver Production Proven DFM FlowMay 15, 2007
Mentor Graphics Customers Reap Success with ADVance MS Mixed-Signal Verification Platform Mar 1, 2007
STARC Standardizes on Calibre YieldAnalyzer as Reference Tool in DFM Flow for Critical Area ExtractionJan 24, 2007
Mentor Graphics Calibre xRC and Calibre xL Tools Validated for TSMC 65 Nanometer Process TechnologyDec 14, 2006
Cypress Adopts Mentor Graphics Calibre xRC For Parasitic Extraction; Cites “Unparalleled Accuracy” Dec 14, 2006
Mentor Graphics and TSMC Provide TSMC-Qualified Process Design Kit for 0.13 micron Mixed-Mode and RF DesignNov 30, 2006
Mentor Graphics Releases Next-Generation OPC SolutionNov 29, 2006
Mentor Graphics Announces New Benchmark for First Year Product Success with Calibre OPCverifySep 19, 2006
Mentor Graphics Calibre OPCverify Selected by Matsushita for Manufacturing Verification of Nanometer TechnologiesSep 18, 2006
Agere Systems’ Storage Division Readies for 65 Nanometers with Adoption of Mentor Graphics CalibreSep 12, 2006
Jazz Semiconductor and Mentor Graphics Release Comprehensive Design Kits for Analog/Mixed-Signal Integrated Circuit Design FlowSep 5, 2006
Haier IC Adopts Mentor Graphics Eldo Simulator as the Standard Tool for Analog Circuit DesignAug 23, 2006
Mentor Graphics to Deliver Select EDA Technologies To Freescale SemiconductorAug 14, 2006
Mentor Graphics Calibre nmDRC Supports the AMD Opteron ProcessorJul 27, 2006
Mentor Graphics Calibre nmDRC Delivers Superior Productivity on the Intel Dual-Core Xeon 5160 ProcessorJul 27, 2006
Mentor Graphics Calibre nmDRC Adopted by UMC to Address Shifting Requirements for Sign-offJul 26, 2006
TSMC Qualifies Mentor Graphics Calibre nmDRC on 65nm ProcessJul 26, 2006
Mentor Graphics and ARM Validate Physical IP for Robustness to Lithographic Variation Using Calibre LFDJul 26, 2006
Mentor Graphics CEO to Moderate Panel at the Design Automation Conference Jul 19, 2006
Mentor Graphics Integrates the Newly Acquired ADiT Fast-SPICE Technology with ADVance MSJul 11, 2006
Mentor Graphics Shatters Traditional Definition of Design to Manufacturing Handoff with Calibre nmDRC; Part of New Calibre nm PlatformJul 10, 2006
Mentor Graphics Calibre Platform Provides Integrated DFM Flow for TSMC 65nm TechnologiesMay 17, 2006
Enuclia Standardizes on Mentor Graphics Calibre Platform for Physical Verification and Parasitic Extraction of its New DTV ASIC DesignsMay 12, 2006
Mentor Graphics Calibre Tools Strengthen DFM Flow for IBM/Chartered/Samsung 65 nm Common Platform Technology Mar 30, 2006
Mentor Graphics Unveils New Calibre Litho-Friendly Design Product, Bringing Process Variability Data into the Design FlowMar 6, 2006
MediaTek Adopts Mentor Graphics Eldo for their Library CharacterizationJan 13, 2006
Faraday Adopts Mentor Graphics Eldo as their Internal SPICE SimulatorJan 10, 2006
Mentor Graphics Next Generation OPC Technology Ensures Yield Across Manufacturing Process WindowJan 9, 2006
SMIC Adopts Mentor Graphics Eldo Simulator for Analog Circuits for its 0.13-micron and Below Process NodesJan 6, 2006
Mentor Graphics Announces Product Certification for 64-Bit Red Hat Enterprise Linux Platform Sep 1, 2005
Mentor Graphics CEO to Keynote SBC 2005May 6, 2005
TSMC Validates 90nm Process Technology with Mentor Graphics Calibre xRC Test Chip Program Jan 12, 2005
Mentor Graphics Delivers Analog Mixed Simulator to NEC ElectronicsNov 23, 2004
Toshiba Achieves Significant Success in Adoption of Verilog-AMS Language Design with the Mentor Graphics Mixed-Signal Simulator, ADVance MSNov 17, 2004
Mentor Graphics Pioneers New DFM Technology by Leveraging Calibre Design-to-Silicon PlatformOct 19, 2004
Mentor Graphics Announces OASIS Stream File Format Ready for Production, 10X-50X File Size Reduction Benefit ConfirmedSep 14, 2004
Mentor Graphics Advances Accurate Nanometer Silicon Modeling with New Resistance and Capacitance EnginesSep 13, 2004
Mentor Graphics Announces Support For 64-Bit Linux Computing Platforms Based on AMD64 ProcessorsJul 12, 2004
Mentor Graphics Offers Technology Design Kit and Design Flow for SMIC 0.18-micron Mixed-Signal ProcessJul 7, 2004
UMC Validates the Mentor Graphics Calibre xRC Parasitic Extraction Solution for 90nm Process TechnologyJun 28, 2004
GDS-to-OASIS Translator Available as Free Download from Mentor Graphics Web siteJun 15, 2004
Mentor Graphics Calibre Approved Verification Tool for IBM-Chartered 90nm Design Enablement PlatformMay 24, 2004
Simtek Adopts Calibre xRC for Parasitic Extraction, Cites Optimized Hierarchical Netlisting CapabilityMay 12, 2004
Mentor Graphics Announces the Availability of Calibre on the OpenAccess DatabaseMay 12, 2004
Design for Manufacturing Must Move up in the IC Flow Apr 14, 2004
Mentor Graphics and X-FAB Provide New Production-Proven Design Kits for Mentor's Mixed-Signal IC Design FlowApr 8, 2004
Silicon Modeling in the Nanometer Era Mar 4, 2004
Mentor Graphics Boosts Scalability of the ADVance MS Mixed-Signal Functional Verification PlatformFeb 9, 2004
Lithography: The Integration of TCAD and EDAFeb 1, 2004
Motorola Selects Mentor Graphics TestKompress and Calibre Products for High Quality Manufacturing Test and Technology Sign-OffJan 28, 2004
Zoran Adopts Mentor Graphics Calibre xRC for Parasitic Extraction of System-on-Chip DesignsSep 24, 2003
Mentor Graphics Joins Chartered NanoAccess Alliance and Delivers Comprehensive Support for 90nm TechnologySep 18, 2003
A Little Light Magic, IEEE Spectrum Sep 1, 2003
Application of Advanced Phase-Shift MasksSep 1, 2003
Mentor Graphics Calibre xRC Adopted by Faraday Technology for Parasitic ExtractionJul 21, 2003
Mentor Graphics Calibre Named Internal Standard for Physical Verification and Production Sign-Off at Hua Hong NECJul 14, 2003
Turning Up The Yield - IEE Electronics Systems and Software Jul 8, 2003
Mentor Graphics Augments its Analog/Mixed-Signal SoC Design Flow with ICassemble for Floorplanning and Automated Routing at All Levels of the Design HierarchyJul 7, 2003
Mentor Graphics Expands Support for IBM Foundry ProcessesJul 1, 2003
Tower Semiconductor Adopts Mentor Graphics Calibre as Internal Standard for Design-to-SiliconJun 16, 2003
Mentor Graphics Provides TestKompress and Calibre Products for Infineon's Nanometer Design FlowJun 2, 2003
Simulators Shred the Limits of Mixed Signal Designs Jun 1, 2003
Mentor Graphics Appoints New VPMay 30, 2003
Chartered and Mentor Graphics Combine Expertise to Offer Mixed-Signal Technology Design KitMay 20, 2003
Mentor Graphics Announces Strategic Alliance with STMicroelectronics to Improve AMS and RF Design ProductivityMay 15, 2003
Mentor Graphics and austriamicrosystems AG Announce High-Performance Design Kits for complex Mixed Signal and RF DesignsMay 13, 2003
Mentor Graphics Unveils Calibre MTflex to Combat Cost of Nanometer Design Compute RequirementsMay 12, 2003
SiWorks Successfully Completes Adaptive Equalizer Core Using Mentor Graphics ADVance MS SimulatorApr 28, 2003
Mentor Graphics Adds Two New Mask Writing Formats to its Calibre Mask Data Preparation SolutionApr 16, 2003
SMIC Chooses Comprehensive Set of Mentor Graphics Tools for Design and Physical VerificationMar 24, 2003
Mentor Graphics ADVance MS Adopted by ToshibaMar 12, 2003
Mentor Graphics Enhances Calibre RET Tools to Tackle High Accuracy Requirements of Sub-100nm NodesFeb 24, 2003
Mentor Graphics Calibre "Golden" Rule Files Available for 90nm Technology Process at UMCFeb 19, 2003
Silterra Malaysia Standardizes on Mentor Graphics Calibre Tool SuiteFeb 11, 2003
Mentor Graphics Calibre Named Internal Standard for Physical Verification at GSMCJan 28, 2003
Mentor Graphics and UMC Strengthen Partnership with the Development of 0.18 Micron Mixed-Signal Design KitsJan 20, 2003
Streamlining the SoC Design FlowNov 22, 2002
Follow the Golden Rule Files Nov 22, 2002
Mentor products target wireless devicesAug 27, 2002
Mentor Graphics Delivers New Version of ADVance MS to Support Growing Analog and RF Content in AMS SoC DesignsAug 26, 2002
Mentor Graphics Announces Calibre xRC, Full-Chip, Transistor-Level Parasitic Extraction for SoC DesignsAug 26, 2002
Mentor Graphics Announces New Front-to-Back IC Design Flow to Meet Today's Analog/Mixed-Signal SoC Design ChallengesAug 26, 2002
The 39th DAC Design the "Big Easy" Way - EDN May 15, 2002
Calibre Interactive: Calibre for Cell & Block VerificationDec 6, 2001
Mask Data Preparation Sidesteps Data Volume Complications. - Electronic Design Article by David Maliniak Dec 1, 2001
Physical verification tool makes direct mask link Oct 2, 2001
Mentor Extends Calibre Technology For MDPOct 2, 2001
Simulation Tool Models And Verifies Timing Jiter In Oscillators - MICROWAVES & RF Sep 12, 2001
Mentor tool takes on Cadence in physical verificationJun 3, 2001
Toshiba Corporation to extend Toshiba?s adoption of the Mentor Graphics® Calibre® tool suite as the standard for manufacturing 0.13 micron semiconductors Jan 22, 2001
Mentor Graphics Announces IBM Design Rule Files for Calibre Dec 20, 2000
UMC Adopts Mentor Graphics Calibre Sub-wavelength Solutions Sep 11, 2000
Mentor Graphics provides industry's first full custom IC design solution on LinuxAug 21, 2000
Mentor's Eldo RF performs phase-noise analysisAug 14, 2000
New Release Of Mentor Graphics Simulator Delivers Critical Enhancements For Design Of Radio Frequency Integrated CircuitsAug 14, 2000
Chartered Semiconductor Manufacturing Selects Mentor Graphics Calibre as Gold Standard for Physical Verification and Supports Models for Mentor Graphics Eldo Analog Simulator Jul 24, 2000
UMC foundry customers now receive fully qualified, silicon-calibrated device model parameters for EldoJul 17, 2000
Industry Leaders Continue To Adopt Mentor Graphics Mach TA For IC Timing AnalysisJun 13, 2000
Mentor Graphics Announces Availability of Design Architect-IC to Speed Design of Full Custom Integrated CircuitsMay 23, 2000
Mentor Graphics Strengthens Its SoC Leadership With New TeraPlace Physical Implementation Tool SuiteApr 17, 2000
Mentor Graphics Announces Major Enhancements to Calibre's Line of Physical Verification and Manufacturability Tools Apr 10, 2000
TSMC Becomes First Foundry to Support Mentor Graphics Analog Circuit Simulator EldoApr 3, 2000
Mentor Graphics Launches Mach PA For Dynamic Power AnalysisMar 29, 2000
ASML Masktools offers scattering-bar IP for use with Mentor Graphics' Calibre software Feb 29, 2000
Sun Microsystems, Inc. Adopts Mentor Graphics Calibre Solution For Verification Of Next-Generation SPARC Microprocessors Feb 14, 2000
NEC Standardizes on Mentor Graphics Calibre Tool Suite to Decrease Time-to-Market and Increase YieldFeb 2, 2000
