Top 10 DFT Papers
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Read about the latest, innovative techniques in Design-for-Test technology in subjects such as proven DFT solutions, high quality test, compression solutions and yield improvements. These articles and conference papers will give you insight on Mentor Graphics Design-for-Test technology. PapersSolutionsProven DFT SolutionsMentor's DFT products have been effectively used in billions of devices. Even products that are considered relatively new such as TestKompress are already used in over a billion devices and over one thousand designs. All Mentor DFT tools (including TestKompress and YieldAssist) are recommended in the latest TSMC and UMC reference flows.
QualityBest Quality TestMentor Graphics provides the most effective test capabilities for all digital logic within a device. At-speed test using PLL with efficient false and multi-cycle path handling is critical for logic test. Memory BIST and MacroTest provide a complete solution to fully test memory devices with BIST or non-intrusively.
CompressionMost Effective CompressionTestKompress provides the highest level of compression possible. This compression not only dramatically reduces test time (and data) but can also be used for dramatic reduction of test pins and signals. In fact, as few as 1 scan channel can be used within TestKompress blocks.
Yield ImprovementYield ImprovementYieldAssist is a new capability in failure diagnostics that ties scan test failures from testers to ranked physical problems and locations. It has direct links with the Calibre tools for viewing and works directly with TestKompress compressed patterns for volume on-line diagnostics.
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